1. Field of the Invention
The present invention relates to an imaging system, and, more particularly, to a tri-state detection circuit that may be used, for example, in devices associated with an imaging system.
2. Description of the Related Art
A tri-state detection circuit accommodates the detection of tri-state signals having three possible signal levels, or states: a logic high (1) level, a logic low (0) level, and a floating (high-impedance) level. It is known to employ tri-state signals in conventional binary logic circuits. Tri-state input signals increase the amount of information that can be conveyed into a receiving circuit for a given number of inputs. For example, in a conventional binary receiving circuit, each input and/or output is allowed to be either a zero or a one. Assuming that the binary receiving circuit has two inputs, the binary receiving circuit provides a total of four possible input combinations. However, if the two input receiving circuit is capable of detecting the three states of a tri-state signal, then a total of nine input combinations are possible.
Several circuits have been developed to detect the state of a tri-state input signal. Typically, however, such circuits require a relatively large number of components for successful implementation, which in turn occupies a considerable amount of area on an integrated circuit substrate and increases power consumption.
What is needed in the art is a tri-state detection circuit that can be configured with a minimal number of components.